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Graphcore

About Us Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Job Summary Working within the logical design team, the silicon logical design engineer is responsible for a wide range of logical design tasks. The team is responsible for delivering the Microarchitecture and RTL design to implement the chip architecture specification for Graphcore Silicon, working closely with other engineers within the Silicon team. The successful candidate will be responsible for helping the team deliver high quality micro-architecture and RTL for Graphcore chips, working within the logical design team and with the broader Silicon team to ensure we meet the company objectives for Silicon delivery. Responsibilities and Duties Integrate IP and subsystems into top-level SoC designs Develop and maintain build and configuration environments Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level Support verification and physical design teams through clean interface hand-offs Debug and resolve integration-related issues across multiple hierarchies Contribute to the continuous improvement of integration flows and automation Producing high quality microarchitecture and other documentation Ensure good communication between sites to maintain consistent working practises Candidate Profile Essential skills: Logical design experience in relevant industry Experience range 8-12 years in Semiconductor Industry/Product development exposure. Be highly motivated, a self-starter, and a team player Ability to work across teams and debugging issues seen to find root causes Degree in Computer Science, Engineering or related subject Ability to script in Python and/or TCL for automation and to solve design issues SystemVerilog Knowledge of digital design flows Desirable skills: Processor design Application specific blocks High-speed serial interfaces Complex third-party IP integration Arithmetic pipeline design Floating-point design Design for test Synthesis Timing Analysis Project Planning Power Integrity Silicon transistor Benefits: In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

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Graphcore

About Graphcore At Graphcore, we’re building the future of AI compute. We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale. As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem. To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world. We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. Job Summary Working within the Logical Design team, the Staff/Principal Silicon Logical Design Engineer is responsible for a wide range of logical design tasks which require working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture specifications and RTL for Graphcore chips, and assisting the rest of the Silicon teams to ensure we can meet the company objectives for silicon delivery. The Team The Logical Design team sits within the Silicon team. We are responsible for delivering the micro-architecture and RTL design to implement the chip architecture specification for Graphcore Silicon. Responsibilities and Duties Being part of the Logical Design team, producing high quality micro-architecture specification and RTL for Graphcore chips Ensuring good communication between different teams and across multiple sites Contributing to shared design infrastructure and flows Using EDA tools and the Graphcore design flow to design innovative technologies Contributing to block-level and chip-level checks and auditing (Linting, Synthesis, Timing Closure, CDC, RDC, Coverage) Working closely with Physical Design, Verification and DFT teams Essential skills: Degree in Computer Science, Engineering or a related subject Digital design experience in a relevant industry Be highly motivated, a self-starter, and a team player Ability to work across teams and finding solutions to problems Ability to solve design issues through programming, e.g. Python, Tcl Strong competency in SystemVerilog or VHDL Knowledge of digital design flows Capable of managing time and priorities Desirable: Processor design Application specific blocks High-speed serial interfaces Complex third-party IP integration Experience leading teams Arithmetic pipeline design Floating-point design Design for test Synthesis Timing Analysis Logical Equivalence Project Planning Power Integrity Silicon transistor knowledge Benefits In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

1743 Position Summary We are seeking an experienced Board-Level Hardware Validation Engineer to define and execute the validation and verification of complex electronic systems throughout the product lifecycle. This role is responsible for defining validation strategies, developing test plans, executing hands-on testing, analyzing failures, and working directly with ODM partners to ensure products meet performance, reliability, quality, and compliance requirements before mass production. The ideal candidate combines strong electrical engineering fundamentals with practical lab expertise and is comfortable personally performing validation activities while coordinating with cross-functional teams and manufacturing partners. This position is in Austin, Texas. Key Responsibilities Validation Strategy & Planning Define comprehensive board-level and inter-board level validation plans based on product requirements, design specifications, and customer use cases. Develop validation methodologies covering functional, electrical, thermal, power, signal integrity, reliability, and stress testing. Establish test coverage, acceptance criteria, and qualification requirements. Review hardware architecture and schematics to identify validation risks and test requirements early in the design cycle. Hands-On Validation Execution Personally develop, automate, and execute validation tests on prototype and production-intent hardware. Perform board bring-up, functional verification, electrical characterization, and system-level validation. Use oscilloscopes, logic analyzers, spectrum analyzers, power analyzers, environmental chambers, and other laboratory equipment to collect and analyze data. Create custom test fixtures, scripts, and tools to improve test efficiency and coverage. ODM & Manufacturing Collaboration Work directly with ODM partners to align validation plans, test procedures, and qualification activities. Review ODM validation reports and ensure consistency with internal quality standards. Drive issue resolution across ODM, design engineering, manufacturing, and quality teams. Debug & Root Cause Analysis Investigate hardware failures and validation escapes through systematic root-cause analysis. Drive corrective actions with hardware design, firmware, manufacturing, and supplier teams. Validate fixes and verify closure of identified issues. Maintain detailed failure analysis documentation and lessons learned. Documentation & Reporting Author test plans, validation procedures, test reports, and qualification summaries. Track validation status, risks, defects, and corrective actions. Present validation results, recommendations, and readiness assessments to engineering leadership and stakeholders. Ensure traceability between requirements, test coverage, and validation outcomes. Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 7+ years (or appropriate level) of board-level hardware validation experience. Strong understanding of digital and mixed-signal electronic systems. Experience validating high-speed interfaces such as PCIe, USB, Ethernet, DDR, MIPI, SPI, I2C, UART, or similar technologies. Hands-on experience with laboratory instrumentation and measurement techniques. Experience working with ODMs, contract manufacturers, or external engineering partners. Strong hardware debugging and root-cause analysis skills. Experience developing test automation using Python, LabVIEW, MATLAB, or similar tools. Excellent technical documentation and communication skills. International and domestic travel as needed. Preferred Qualifications Experience with server, networking, embedded, AI/ML hardware, or datacenter platforms. Experience supporting NPI and manufacturing ramp activities. Experience with schematic review and PCB design fundamentals. Key Competencies Ownership and accountability Strong analytical and debugging skills Hands-on laboratory expertise Cross-functional collaboration ODM/vendor management Data-driven decision making Attention to detail Ability to balance strategic planning with hands-on execution USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

Position Summary We are seeking an experienced System Level Hardware Project Engineer to coordinate with multiple development teams. This role is responsible for planning, coordinating, and executing technical oversight of the deliverable. You will be working with internal teams as well as directly with ODM partners. The ideal candidate combines strong technical hardware knowledge with exceptional leadership skills and thrives in fast-paced environments where innovation, collaboration, and execution are critical. This position is in Austin, Texas. Key Responsibilities Develop and maintain integrated project milestones, risks, and execution plans. Coordinate cross-functional teams for technical topics including: Hardware Engineering Mechanical Engineering Electrical Engineering Firmware BIOS/BMC Signal Integrity Thermal Engineering Manufacturing Engineering Supply Chain Quality Operations Manage development engineering deliverables through each phase of the product lifecycle. Identify technical risks early and develop mitigation strategies. Support program reviews with concise status reporting and data-driven decision making. Coordinate issue resolution across engineering organizations to remove blockers and maintain project momentum. Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 7+ years (or appropriate level) of Project Engineering experience. Strong understanding of digital and mixed-signal electronic systems. Experience working with ODMs, contract manufacturers, or external engineering partners. Strong hardware background. Excellent technical documentation and communication skills. International and domestic travel as needed. Preferred Qualifications Experience with server, networking, embedded, AI/ML hardware, or datacenter platforms. Experience supporting NPI and manufacturing ramp activities. Experience with schematic review and PCB design fundamentals. Key Competencies Ownership and accountability Cross-functional collaboration ODM/vendor management Data-driven decision making Attention to detail Ability to balance strategic planning with hands-on execution USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

Staff Embedded SW/FW Engineer (Bringup) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team developing C code used to validate cutting-edge, high-performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Bringup team, you will be involved with bringing first silicon to life, developing code primarily in C to configure and exercise systems and sub-systems on new silicon devices, and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon bringup sequences and test in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy configuration sequences and validation tests on first silicon and debug them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs. Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems. Excellent problem-solving, analytical & diagnostic skills Desirable: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Understanding of ML applications and their workloads. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support Benefits: In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are looking for an experienced System Level Test Engineer to join our Product Test and Diagnosis Department (PTD). In this role, you will contribute to the development and deployment of System Level Test (SLT) solutions for next-generation AI processors. Working closely with hardware, software, validation, and manufacturing teams, you will develop test content, automation, diagnostics, and characterization capabilities that support silicon bring-up, yield learning, and manufacturing deployment. The ideal candidate will have strong technical foundations in semiconductor test and validation, excellent debug skills, and a passion for improving product quality and manufacturability. The Team The Product Test and Diagnostics team’s role is to detect and manage hardware defects that arise from the manufacture and use of our products. This covers chips, boards and finished systems and takes place both in the manufacturing sites and in the field. Responsibilities and Duties Develop and maintain SLT test content, automation, diagnostics, and characterization workloads for silicon bring-up and manufacturing readiness activities. Execute characterization, voltage/frequency margining, reliability screening, and performance correlation activities while analyzing results and identifying improvement opportunities. Support development and deployment of SLT hardware including test boards, sockets, instrumentation, and thermal solutions. Integrate validation and bring-up workloads into the SLT environment and support development of manufacturing screening solutions. Debug failures, perform root-cause analysis, and support correlation activities across Simulation, ATE, Bench, SLT, and manufacturing environments. Develop software tools, scripts, and automation flows for test execution, telemetry collection, data analysis, and reporting. Contribute to improvements in test coverage, test-time optimization, DPPM reduction, and manufacturing readiness. Work closely with Design, DFT, Silicon Validation, Product Engineering, Manufacturing, and OSAT teams to support product development and deployment activities. Support transfer of SLT solutions into production environments and assist with manufacturing ramp activities. Mentor junior engineers and contribute to continuous improvement of SLT methodologies and best practices. Minimum Qualifications: Experience in semiconductor test, validation, characterization, post-silicon bring-up, or manufacturing environments. Understanding of semiconductor fundamentals, digital systems, power delivery, signal integrity, and board-level debugging. Familiarity with DFT concepts including scan, JTAG, BIST, MBIST, boundary scan, and manufacturing test methodologies. Experience with Python, Tcl, Shell, or similar scripting languages for automation and data analysis. Strong debug, problem-solving, root-cause analysis, and data interpretation skills. Experience working with cross-functional teams including Design, DFT, Validation, Product Engineering, or Manufacturing. Bachelor's degree in Electrical Engineering, Computer Engineering, or related field. Preferred Qulaifications Familiarity with advanced packaging, chiplets, or high-performance computing products. Experience with manufacturing test and production environments, along with OSAT engagement. USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

1671 About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design, with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, I2C, etc. and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes. Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes. Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk. Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes, and related I/O technologies. Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE, or equivalent. Ability to correlate lab measurements with simulations and use data to guide design decisions. Strong communication skills, including the ability to produce clear validation reports, present technical findings, and work effectively across multi-functional engineering teams. Preferred Qualifications Experience in hyperscale, data center, cloud infrastructure, or advanced compute hardware environments. Experience with blade, backplane, board-to-board, cable, or rack-level interconnect architectures. Knowledge of thermal and mechanical considerations that impact SI/PI performance. Experience with calibration, de-embedding, fixture design, lab automation, or measurement methodology development. Experience using Python, MATLAB, or similar scripting languages for simulation automation, measurement automation, and data analysis. Tools / Technologies Measurement: VNA, TDR, BERT, high-speed oscilloscopes Simulation: Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE Interfaces: PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, high-speed interconnects Analysis: S-parameters, eye diagrams, jitter, timing margins, impedance control, crosstalk, insertion loss, return loss, de-embedding, measurement-to-simulation correlation Why Join Us This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance. USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. The role is responsible for leading teams focused on identifying, reproducing, analysing and resolving complex silicon, firmware and system-level issues during bring-up, characterization and product readiness. This position combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering disciplines. The role will work closely with architecture, RTL, firmware, software and systems teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The role will work closely with architecture, RTL, firmware, software, systems and platform teams to improve debug methodologies, accelerate issue resolution and strengthen validation coverage. The Team The Post-Silicon Debug and Validation team sits within the Architecture and Validation organisation and is responsible for bring-up, debug and validation of Graphcore silicon and systems. The team works across the full product lifecycle, supporting first silicon bring-up, subsystem validation, system integration and production readiness activities. Engineers collaborate closely with hardware, firmware, software and systems teams to investigate complex failures, develop debug methodologies and improve validation infrastructure. Responsibilities and Duties Lead post-silicon debug and validation activities for AI compute silicon and platform technologies Contribute to debug and validation activities across multiple projects and milestones Drive prioritisation, planning and execution of debug and validation activities across multiple projects and milestones Investigate and resolve complex silicon, firmware, software and system-level issues during bring-up and validation Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency Collaborate closely with architecture, RTL, firmware, software and systems engineering teams to identify root causes and implement corrective actions Drive debug of CPU, memory, interconnect and high-speed I/O subsystems under functional, stress and workload conditions Develop and enhance automated debug, regression and validation infrastructure using Python and related technologies Analyse logs, traces, telemetry and hardware data to isolate and characterize system failures and performance issues Support development of validation tests, debug tooling and custom diagnostics to improve coverage and observability Define validation metrics, debug workflows and reporting standards to ensure consistent and repeatable analysis Drive continuous improvement of debug processes, validation methodologies and engineering workflows Communicate technical risks, status and recommendations clearly to engineering leadership and cross-functional stakeholders Support silicon readiness reviews and contribute to product quality and release decisions Contribute to continuous improvement of debug methodologies, validation infrastructure and engineering workflows Candidate Profile Essential: Strong experience in bare metal environments Good knowledge of SoC and platform architectures Expertise in debug infrastructure and post-silicon debug methodologies Strong programming skills in Python, C, or debug scripting languages such as CMM Highly motivated self-starter with a collaborative and team-oriented approach Ability to work across teams and programming languages to identify root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Strong Linux and Python experience Exceptional communication skills and the ability to collaborate effectively to solve complex problems Excellent problem-solving, analytical and diagnostic skills Deep knowledge of scan, DFT, JTAG and trace infrastructure Strong debug skills including fault tree analysis, failure isolation, fishbone methodologies and system-level debug techniques Ability to work independently on technically complex debug and validation activities across hardware, firmware and software domains Desirable Understanding of DFT flows from insertion through post-silicon validation Experience developing tooling for parsing and analysing debug data, including scan dump parsing Driver-level experience with one or more of the following technologies: PCIe Ethernet Memory technologies including LPDDR, DDR and HBM Peripheral interfaces such as I2C, I3C and SPI Experience using CoreSight and similar debug infrastructure including CTI, ETx, DStream, JLink, Lauterbach, ATB and STM Good knowledge of mixed-signal building blocks such as PLLs, high-speed PHYs and IC control/communication protocols Experience with Arm CPU architectures, system IP and associated debug tooling Experience with AMBA protocols Understanding of ML applications and associated workloads Experience in characterization, failure analysis, test development, statistical analysis and customer support

JOB

Graphcore

About Graphcore At Graphcore, we’re building the future of AI compute.We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence. Job Summary We are looking for an experienced Silicon Test Engineer to join our Product Test and Diagnosis Department (PTD). This is a pivotal role and will involve building a team of engineers to develop System Level Test (SLT) capability within the company. Working closely with a cross-functional team you will implement SLT tests for a family of next generation AI Processors. The ideal candidate should have a focus on quality and demonstrate a good understanding of the importance of production test on the success of a product. They will have a proven Functional Test or ATE Test Engineering background, and will have a pragmatic, hands-on and flexible approach to a fast-changing environment. The Team The Product Test and Diagnostics team’s role is to detect and manage hardware defects that arise from the manufacture and use of our products. This covers chips, boards and finished systems and takes place both in the manufacturing sites and in the field. Responsibilities and Duties Managing a team of engineers to implement SLT test solutions for a multi-die AI Processor product Working with the Silicon, Test and DFT teams to define manufacturing test solutions Working with key industry leaders to develop an SLT system capable of meeting the products needs Understanding of top, and board level DFT strategies within a 3D, multi-die product Understanding of implementation details for an Incoming Quality Inspection (IQC) stage, and the inter-department complexities Defining test fixtures for SLT Test Solutions: Structural and functional test equipment, interface PCBs, sockets, cooling systems, etc Writing Production, Engineering and Characterisation Test Programs on Advanced SLT platforms Working with other departments to balance test coverage and fault detection across all test stages in the flow; ATE, board, blade, and in-field test Correlation to bench measurements Transferring test solutions to the offshore vendors, as part of an NPI release Work collaboratively with other engineering teams to ensure successful silicon, and board bring-up and help identify any silicon failures to enhance yield learning and improvement Candidate Profile Essential: A pragmatic approach, the ability to improvise, pitch in, and get the job done Experience in production test of large digital devices Very good knowledge of digital integrated circuits and advanced test techniques Very good understanding of DFT components such as (i)JTAG (IEEE 1149.x), BIST, MBIST, etc Understanding of functional test of complex systems Experience in transferring to volume manufacture to OSATs and Contract Manufacturers Ability to work within high pressure cross-department and cross-company teams Ability to mentor junior members of the team Strong scripting and debugging skills using programming languages like Python, TCL, Perl, Shell etc Degree level qualifications in electronics or a related field Good communication skills Desirable Proven competence on SLT testers Experience of thermal control of high-power devices in a production environment. Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

Principal Post Silicon Validation Engineer (Bringup) Salary $241,100 - $326,100 + Phantom Equity + Benefits Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing. We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Essential skills: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems Excellent problem-solving, analytical & diagnostic skills Desirable skills: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable Experience of Arm CPUs, System IP and debug tools Experience of AMBA protocols Understanding of ML applications and their workloads Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

Principal Embedded SW/FW Engineer (Bringup) - Bengaluru, multiple vacancies Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML applications and their workloads A self-starter who can apply independent judgement A team player able to lead and support colleagues with difficult concepts Strong experience in Bare metal / embedded C/C++ Excellent problem-solving, analytical & diagnostic skills Ability to work across teams and programming languages to find root causes of critical and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to explain difficult concepts to resolve issues Desirable 10+ years experience Experience building and leading, multi-site teams Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

JOB

Graphcore

Principal Embedded SW/FW Engineer (Bringup) - Austin, Tx, USA Job Summary We have an exciting opportunity to be part of a collaborative, cross-functional development team validating cutting-edge, high-performance AI chips and platforms. You will play a key role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to provide technical guidance to other engineering team members. In this role, you can leverage our experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Team The Post-Silicon Bringup team sits within the Architecture and Validation team, we are responsible for bringup and validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Candidate Profile Essential: Understanding of ML applications and their workloads A self-starter who can apply independent judgement A team player able to lead and support colleagues with difficult concepts Strong experience in Bare metal / embedded C/C++ Excellent problem-solving, analytical & diagnostic skills Ability to work across teams and programming languages to find root causes of critical and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to explain difficult concepts to resolve issues Desirable 5 to 10 years’ experience Experience building and leading, multi-site teams Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable. Experience of Arm CPUs, System IP and debug tools. Experience of AMBA protocols. Experience in Characterization, Failure Analysis, Test Development, Statistical analysis,

JOB

Graphcore

About Graphcore Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. The Role: We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation. Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes. The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. Responsibilities and Duties Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon Deploy silicon validation tests on first silicon and debugging them Develop automated test framework and regression test suites in Python to optimize validation efficiency Collaborate closely with engineers from many other disciplines on a variety of topics Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies Analyse test results, identify and debug failures/defects Contribute to shared test and validation infrastructure Provide feedback to architects Essential skills: Strong experience in Bare metal / embedded C/C++ Good knowledge of digital ASICs Be highly motivated, a self starter, and a team player Ability to work across teams and programming languages to find root causes of deep and complex issues Experience of the post-silicon validation process applied in digital ASIC environments Python, Linux Excellent communication skills and the ability to collaborate with others to solve problems Excellent problem-solving, analytical & diagnostic skills Desirable skills: Driver level experience with one or more of the following is highly desirable: PCIe Ethernet Memory technologies (LPDDR, DDR, HBM, …) Other peripherals such as I2C, I3C, SPI, … Good knowledge of mixed-signal building blocks such as PLLs, high speed PHYs and IC control/communication protocols is highly desirable Experience of Arm CPUs, System IP and debug tools Experience of AMBA protocols Understanding of ML applications and their workloads Experience in Characterization, Failure Analysis, Test Development, Statistical analysis, and Customer Support Benefits: In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

JOB

Graphcore

About the job Help shape the first moments of life for the next generation of AI processors. You'll lead the bring-up and characterisation of Graphcore's silicon devices and system platforms. Your work will ensure products perform reliably before they reach customers. You'll build and lead a team that develops characterisation plans, automates testing, and analyses results across silicon and system platforms. You'll work closely with architecture, silicon, hardware, operations and product teams to solve complex technical challenges. This is a hands-on technical leadership role with the opportunity to influence product design, shape new capabilities, and build a team from the ground up. The team and culture You'll join a newly formed team within Manufacturing Operations and help define how bring-up and characterisation is delivered at Graphcore. Your decisions will shape the team's direction as it grows. The team works closely with colleagues across Bristol, Cambridge and Taiwan. Success comes from solving problems together, sharing data, and making informed engineering decisions. You'll be trusted to take ownership, remove blockers, and improve how work is done. We value people who speak up, challenge assumptions, and turn ideas into practical solutions. What we're looking for Essential Proven track record of delivering technical outcomes as an individual contributor, manager, or project manager, with strong communication and stakeholder management skills. Solid experience in silicon digital device design, bring-up, and characterisation, with a good understanding of silicon process technology and its impact on transistor- and system-level performance. Strong knowledge of high-performance processors, system-on-chip (SoC) architectures, and high-speed digital interfaces such as PCIe, Ethernet, and DDR. Experience with measurement automation, data analysis, and developing code or scripts to support automated testing and analysis workflows. Bachelor's degree (or equivalent practical experience), with a background understanding of ATE systems and their role in silicon characterisation. Desirable Knowledge of PCBA and system level technologies. Project management experience. Benefits Unlimited annual leave Up to 5% matched pension Phantom equity – share in Graphcore's success True flexibility in how and where you work Office spaces designed for collaboration Free food and an on-site barista Health cash plan Income protection Life assurance Along with other benefits you can choose from (private medical insurance, dental plan etc) Inclusion statement We welcome people from all backgrounds and experiences and are committed to building an inclusive environment where everyone can do their best work. We're an equal opportunity employer and recognise that everyone brings different strengths and perspectives. If you need any adjustments during the interview process, just let us know. We're happy to support you. Join the Team at Graphcore Graphcore is building the compute platform for the next generation of artificial intelligence. From advanced silicon to intelligent software, our technology is designed to unlock breakthroughs in AI and bring its benefits to every industry. As part of the SoftBank Group, we're backed by one of the world's most ambitious technology investors, working alongside companies shaping the future of AI. Together, we share a bold goal: to help enable artificial superintelligence and ensure it delivers meaningful impact at a global scale. At Graphcore, you'll work with people who are pushing the boundaries of what's possible. Our teams bring together AI researchers, chip designers, software engineers and systems experts from a wide range of backgrounds. It's an environment where we take on big challenges with curiosity and focus, move quickly and decisively, take real ownership of our work, and speak up to challenge ideas, stepping up to support each other and lead through action. If you want to build the systems that validate the next generation of AI hardware and lead a team making a measurable impact, we'd love to hear from you. Apply now to join Graphcore.