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Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a person ready to take up the challenge of working in a high-profile project where we integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will ensure functionality and performance of the system. This role is based out of Tokyo, Japan and offer flexible Hybrid work style. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Responsibilities: Verify Tenstorrent’s digital IP and SoC logic at chiplet integration level, using industry standard verification methodologies Build and improve components of verification infrastructure including model builds and simulation/regression runs, Create verification components like testbenches, checkers and test generators, Add assertions and coverages along associated methodologies, Build verification test plans for subsystems, align them with project stakeholders, implement test suites, summarize the results and share feedback with project stakeholders Publish and review verification metrics and drive convergence towards tape-out, Work across boundaries with architects, software and design/emulation teams, Guide and mentor junior engineers. Experience & Qualifications: Advanced degree in electrical, computer engineering or computer science Proven experience in CPU or SoC verification Over 10 years of experience with verification flows, scripting and automation Good knowledge of logic design Knowledge of Verilog//v2k/system Verilog Strong problem solving skills Excellent organizational and communication skills Good English language skills (written and spoken) Nice to Have: Knowledge of RISC-V, machine learning, die-to-die, memory controllers, PCIe, UCIe Knowledge of low level drivers and firmware in C Fluency in Japanese Japanese work visa テンストレントジャパンについて 経済産業省を始めとする日本政府は予算、税制、政策のあらゆる面で世界と競争できるよう投資パッケージを準備しています。2024年にはテンストレントが持つ技術力、経験、人材が評価され、全国規模のプロジェクトを推進するための主要パートナーの 1 つに選ばれました。(詳細はこちらをご覧ください) 日本の半導体産業をより盛り上げるために様々な人材を募集しています。テンストレントジャパンや採用については人事担当（recruiting-jp@tenstorrent.com）までご連絡ください。 Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary collaboration, implementing sophisticated floorplans, power grids, and clock networks while ensuring design closure at the chip level. If you excel at managing the complexity of full-chip physical design and want to deliver next-generation AI hardware, we need your expertise. This role is hybrid, based out of Santa Clara, CA or Austin, TX or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned physical design engineer who thrives on complex, full-chip implementation challenges. Expert at collaborating across disciplines, working effectively with architecture, RTL, and packaging teams. Passionate about optimizing chip-level implementations for power, performance, and area. Detail-oriented professional who drives design closure while maintaining quality and meeting aggressive schedules. What We Need 8+ years of top-level SOC physical design experience on complex, multi-million gate designs. Deep expertise in hierarchical floorplanning, fabric implementation, power grid design, and global clock distribution. Proven track record with bump planning, RDL implementation, and multi-voltage domain designs. Mastery of timing closure, EM/IR analysis, and physical verification at the chip level. What You Will Learn How to implement cutting-edge AI accelerators and high-performance CPUs at the SOC level. Advanced techniques for chiplet integration and next-generation packaging co-design. Strategies for optimizing massive designs with complex power domains and clock architectures. Methods for driving successful chip-level closure through effective cross-functional collaboration. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. 勤務地：東京 Tenstorrentでは、AIサーバーおよび関連インフラの安定運用を支える Support Engineer. AI Infrastrcuture を募集しています。 本ポジションでは、GPUクラスタ、ストレージ、ネットワーク機器を含むシステムの保守・障害対応・予防保守を担当し、社内外の関係者と連携しながら、高可用性なAIインフラ環境の維持に貢献していただきます。 Who You Are ハードウェア保守・障害対応に強みを持ち、現場での迅速な切り分けと対応ができる方 顧客現場やデータセンター環境でのサポート業務を主体的に進められる方 Linuxサーバー、GPUサーバー、ネットワーク機器に関する基本的な知識と実務経験をお持ちの方 インシデント発生時にも冷静に状況を整理し、適切にエスカレーションできる方 国内外の関係者と協力しながら、正確で丁寧なコミュニケーションができる方 実務を通してAIインフラや高性能コンピューティング環境への理解を深めたい方 What We Need AIサーバーおよび関連システム（GPUクラスタ、ストレージ、ネットワーク機器等）の保守・点検・障害対応 サーバー障害時の一次切り分け、オンサイト修理、部品交換 NOC（Network Operations Center）やリモート監視ツールを用いた稼働状況の監視およびログ分析 トラブル発生時のインシデントレポート作成と関係者への報告 ファームウェア、BIOS、ドライバの更新対応 顧客向け定期点検および予防保守の計画・実施 エンジニアリング部門およびサポート部門と連携したエスカレーション対応 保守用在庫の管理、交換部品の配送調整 現場導入支援、設置・移設作業への立ち会いおよび主導 日本語および英語能力 Required Qualifications x86サーバー、もしくはにGPUサーバーの保守経験 ハードウェア障害の切り分けスキル（電源、メモリ、ストレージ、PCIe、GPU等） Linux環境（Ubuntu、RHEL、CentOS等）での操作経験 基本的なネットワーク知識（L2/L3、TCP/IP、DHCP、IPMI） 顧客現場での技術サポート経験、またはオンサイト対応経験 障害対応や保守作業に関するドキュメント作成経験 IPMItool、smartctl、nvidia-smi等の診断ツール使用経験 英語マニュアルの読解力、および海外サポート窓口とのやり取り経験 英会話能力（エンジニア間でのQ&Aが可能なレベル Nice to Have NVIDIA GPUサーバー（DGX、HGX等）やSupermicro、Inspur、Lambda等のハードウェア取り扱い経験 Ethernet、InfiniBand、NVLink、PCIeスイッチに関する知識 データセンターでの運用・保守経験 GPUベースのディープラーニングやAIワークロードに関する基礎知識 Linux shellスクリプトによる簡易自動化経験 普通自動車運転免許 英語での交渉能力および詳細なテクニカルコミュニケ~ションが可能 What You Will Learn 最先端のAIサーバーおよび高性能コンピューティング環境の運用知識 GPUクラスタ、ストレージ、ネットワークを含む大規模インフラの保守・トラブルシューティング実務 社内エンジニアリングチームおよびグローバルサポートチームと連携した問題解決プロセス AIワークロードを支えるハードウェア・システム全体の構造と運用の考え方 急成長するAI・半導体業界における実践的なインフラサポートスキル 本雇用契約の提示は、応募者が米国の輸出管理対象技術へアクセス可能な資格を有することを条件とする場合があります。米国輸出関連法規に基づき、特定の情報、システム、または技術へのアクセスには、市民権、永住権の状況、または必要なライセンス取得可否の確認が必要となる場合があります。 This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Technical Program Manager with physical design expertise to drive execution of our industry-leading AI/ML and CPU processor projects. You'll lead cross-functional teams, manage complex schedules across multiple chiplets, and serve as the primary interface between internal teams and external partners. If you combine technical depth in physical design with exceptional program management skills and want to shape the delivery of next-generation AI silicon, join our team. This role is hybrid, based out of Santa Clara, CA, Austin, TX, or Ft. Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A seasoned program manager with hands-on physical design background and deep understanding of semiconductor development. An exceptional communicator who builds strong relationships with both internal teams and external clients. Detail-oriented and well-organized, with proven ability to manage multiple complex projects simultaneously. A technical leader who can translate between engineering details and strategic program objectives. What We Need BS/MS/PhD in EE/ECE/CE/CS with 5+ years of technical program management in the semiconductor industry. Experience with synthesis, place and route flows, timing analysis, EM/IR, and physical verification. Track record of successfully managing design services partners and client relationships. Strong ability to create and drive schedules while ensuring cross-team alignment on priorities and dependencies. What You Will Learn How to orchestrate complex physical design projects for cutting-edge AI/ML and CPU architectures. Advanced techniques for managing multi-chiplet programs and coordinating with world-class engineering teams. Best practices for balancing technical depth with strategic program execution in a fast-paced environment. Direct influence on project success through ownership of schedule and milestone deliverables. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on Staff Software Engineer with a platform infrastructure / Site Reliability Engineering (SRE) background to help build and operate the systems behind Tenstorrent’s AI cloud. This team develops and runs both on-prem and public cloud infrastructure and services that support high-performance AI workloads. The role spans backend development, service integrations, infrastructure-as-code, CI/CD, and reliability engineering, with room to go deeper in a specialty while working across the stack. This role is hybrid, based out of Austin, TX; Santa Clara, CA; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong software engineer with a track record of designing and delivering complex production services and applications. Fluent in Python, with Go and/or TypeScript as a plus. Experienced with Kubernetes and comfortable working across bare metal, virtual machines, and modern cloud infrastructure; AWS experience is a plus. Familiar with observability and production operations across hardware, system, and application layers, including monitoring, alerting, and telemetry. Bonus points for depth in network automation, storage platforms, and/or cloud or application security. What We Need Build and improve backend services and platform integrations that power Tenstorrent’s on-prem and public AI cloud environments. Raise the bar on infrastructure automation through CI/CD and Infrastructure-as-Code practices using tools such as Ansible and Terraform. Strengthen platform reliability with better observability, monitoring, alerting, and operational response across the stack. Partner effectively with end-users, peers, and domain experts to turn complex infrastructure needs into dependable systems. Bring technical leadership, strong engineering judgment, and a mindset of continuous learning that helps the team scale its capabilities. What You Will Learn How AI cloud infrastructure comes together end-to-end, from data center hardware and fleet operations to user-facing services and interfaces. What it takes to run reliable, high-performance AI workloads across both on-prem and public cloud environments. How hardware, software, networking, storage, and operations intersect inside a real-world AI platform. How to expand into adjacent parts of the stack without getting boxed into a narrow silo. How to apply the latest AI tools in day-to-day engineering work while building practical systems that matter. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent as a Staff Reliability Engineer and help define the reliability strategy behind the next generation of AI computing systems. In this highly visible technical leadership role, you'll drive reliability from architecture through production, partnering across hardware, software, and manufacturing teams to build high-performance AI platforms that set the standard for uptime, durability, and quality. If you're passionate about solving complex engineering challenges and influencing products at scale, you'll have the opportunity to shape technology powering the future of AI. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You've spent 8+ years in reliability engineering, ideally in high-performance computing, AI hardware, or data center systems. You're comfortable with the statistical side of the job, HALT, HASS, ALT, MTBF, Weibull analysis, and FMEA are all familiar territory. You can work through a technical problem in a thermal lab and then explain the risks and trade-offs clearly to leadership. You're good at bringing people together, mechanical, electrical, thermal, and software teams, especially when timelines are tight. What We Need Someone to set the reliability strategy for our next-generation AI computing systems, across both data center and workstation products. A strong problem-solver who can lead root-cause investigations on failures and follow through with fixes across engineering and the supply chain. Someone with real experience validating advanced cooling systems, vapor chambers, heat pipes, direct-to-chip liquid cooling. A steady point of contact for our manufacturing partners and suppliers, making sure reliability standards hold up through the NPI process. Someone who can mentor other engineers and lead design reviews that raise the bar for the team. What You Will Learn How to shape the reliability strategy for some of the industry's most advanced AI computing platforms built around Tenstorrent's cutting-edge silicon. How reliability engineering influences every stage of product development, from architecture and validation through manufacturing and field deployment. How to collaborate with world-class experts across silicon, thermal, mechanical, electrical, and software engineering to solve large-scale system challenges. How to validate emerging cooling technologies, including advanced air cooling and direct-to-chip liquid cooling, for next-generation AI infrastructure. How to influence the future of AI hardware by helping build highly reliable systems that power tomorrow's largest AI workloads. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin,TX or Santa Clara,CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-standard tools (Innovus, PrimeTime, RedHawk) and scripting languages (Tcl, Perl, Python). Deep understanding of advanced node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling). Experience driving physical design requirements from early architecture through final signoff. Experience in power grid design and EMIR is preferred What You Will Learn How to implement cutting-edge AI accelerators and high-performance CPUs on the most advanced process nodes. Innovative PPA optimization techniques and methodologies for next-generation chiplet architectures. End-to-end ownership from flow development to signoff in collaboration with architecture and IP teams. Direct impact on products that are redefining the landscape of AI and high-performance computing. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of North America with preference near one of our main hubs Santa Clara, CA; Austin, TX; or Toronto,ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in meetings, presentations, and workshops to understand their technical challenges and provide effective solutions. Partner closely with sales operations and product teams to provide feedback from customers and help shape future product enhancements. What We Need Strong customer-facing skills with 5+ years of relevant technical, enterprise experience (such as Sales Engineer, Solutions Engineer, or Technical Account Manager). Your field insight will help shape our roadmap, our features, and the way we show up for developers. Proven expertise in AI technologies and frameworks, including machine learning, deep learning, natural language processing (NLP),computer vision, PyTorch or TensorFlow. Experience with embedded systems, FPGA Architecture or AI accelerators. Good understanding of data center, server architecture and deployment, thermal/power, and infrastructure management. What You Will Learn How to explore and push the boundaries of AI performance on custom silicon and help developers do the same. What it’s like to build the future from scratch, working alongside teams creating hardware, software, and everything in between. To master the craft of fine-tuning LLMs, optimizing vision models, and building AI pipelines that run at scale. An understanding of why field roles drive real impact turning on-the-ground insight into product breakthroughs and platform momentum. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an engineer who will focus on pre-silicon verification of DFD logic in advanced AI SoCs, driving coverage of debug, test, and bring-up features critical to silicon success. This role is hybrid, based out of Boston, MA; Toronto, Ottawa; or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Deeply curious about silicon debug/test infrastructure and its verification. Expert in UVM and verification of DFT/DFD features, scan, and on-chip trace logic. Comfortable working with Siemens Tessent flows, iJTAG, and advanced verification automation. Proactive, detail-oriented, and thrives in cross-functional technical discussions. Ideally familiar with tools similar to CocoTB What We Need Develop and own verification environments for DFD logic across AI chiplets and SoCs. Write, refine, and execute test scenarios for scan, MBIST, array dump, and clock-stop features. Analyze coverage gaps, debug failures, and collaborate closely with DFT and RTL teams. Automate flows for JTAG/scanchain testing and integrate AI productivity tools. What You Will Learn In-depth DFD/DFT verification using cutting-edge Tessent workflows and scripting. Integration of pre-silicon DFD verification with silicon debug strategies. How AI-driven automation reshapes modern DV workflows. Exposure to security-conscious debug methodologies in advanced SoC designs. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to iterate through front-end CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Perform synthesis and initial place and route for new and legacy designs. Collaborate closely with core micro-architects to optimize core configurations for best PPA. Use innovative techniques to optimize power, performance, and area while driving physical design experiments and evaluating results. Enhance physical design environment, tools, and methodologies to improve development efficiency. What You Will Learn End-to-end exposure to CPU design from microarchitecture through timing and power convergence. Hands-on experience optimizing CPU designs and driving PPA improvement. Integration of open-source and industry-standard tools to improve physical flows and results. Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin, TX, Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-standard tools (Innovus, PrimeTime, RedHawk) and scripting languages (Tcl, Perl, Python). Deep understanding of advanced node challenges and low-power design techniques (power gating, multi-Vt, voltage scaling). Experience driving physical design requirements from early architecture through final signoff. What You Will Learn How to implement cutting-edge AI accelerators and high-performance CPUs on the most advanced process nodes. Innovative PPA optimization techniques and methodologies for next-generation chiplet architectures. End-to-end ownership from flow development to signoff in collaboration with architecture and IP teams. Direct impact on products that are redefining the landscape of AI and high-performance computing. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Process Engineer to join the Manufacturing Engineering group and help bridge product design and manufacturing execution for Tenstorrent hardware platforms. This role will work closely with design, electrical, mechanical, test, quality, and manufacturing partners to develop robust, scalable manufacturing processes and transition new designs into production. This role is remote, based out of Taiwan. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Manufacturing or process engineer with hardware experience and strong process development fundamentals. Skilled at translating design intent into stable, repeatable production processes. Strong in data-driven problem solving and root cause analysis to close yield and quality gaps. Comfortable driving manufacturability, assembly strategy, and factory execution with cross-functional teams. Clear communicator who aligns internal teams and external manufacturers on actions and risks. What We Need Develop and release scalable manufacturing processes for new products and product changes. Own design transfer into manufacturing, including tooling, documentation, and line readiness. Define, validate, and refine process flows for assembly, integration, rework, and test. Set process capability targets and monitor performance using SPC, DOE, and related tools. Identify manufacturing risks early and drive DFM, DFA, and tolerance issue resolution. What You Will Learn How Tenstorrent moves advanced hardware from design to scalable manufacturing lines. How to balance design intent, manufacturability, yield, and production execution. How to influence product readiness across NPI phases with global partners. How to improve process capability, line efficiency, and design-for-manufacturing outcomes. How to collaborate with contract manufacturers on pilot builds, ramp, and continuous improvement. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we are building open, state of art compute for AI and RISC‑V CPUs. You will lead the technical efforts and strategy around our existing emulation infrastructure for high‑performance CPUs that power these products. Your work will directly enable silicon bring‑up, validation, and customer‑ready systems. This role is hybrid, based out of Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have strong background in CPU verification, emulation, and debug. You are fluent in Verilog and SystemVerilog for complex SoC designs. You are a technical leader who drives complex debug efforts, solves ambiguous technical problems, and mentors younger engineers. Experience with Zebu emulation platforms is a significant plus. You collaborate closely with design, verification, and vendors to move fast and unblock teams. What We Need Lead the technical strategy and execution to scale and optimize existing emulation infrastructure on commercial and open‑source platforms. Enable the emulation infrastructure and workflow, including producing reliable emulation builds. Drive and lead complex cross-functional debug and root cause analysis efforts. Optimize emulation performance and regression flows with Design Verification teams and tool vendors. What You Will Learn How to bring state of art AI and CPU architectures to life on emulation. How to design large‑scale emulation regressions that mirror real customer workloads. How to tune emulation performance across different vendors and hardware platforms. How open hardware and software come together across Tenstorrent’s full compute stack. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. At Tenstorrent, we build open, state of the art compute for real workloads and real developers.You will own CPU core‑level verification, shaping how our out‑of‑order RISC‑V CPUs behave in silicon. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You bring 8+ years in CPU verification or closely related digital design. You know high‑performance out‑of‑order CPU microarchitecture in depth. You work comfortably with RTL, waveforms, logs, and complex debug scenarios. You communicate clearly across design, DV, emulation, and post‑silicon teams. What We Need Plan and drive functional verification for CPU core features and complex microarchitectural scenarios. Develop UVM, assembly, and C/C++ based stimulus, functional models, and coverage for ISA, RISC-V extensions, and un-core components. Debug simulation and emulation regressions using RTL understanding, waveforms, and logs to identify and resolve issues efficiently. Build and enhance coverage models, testbenches, and debug infrastructure to improve verification quality and coverage closure. Collaborate with design, validation, and test teams to support bring-up and delivery of robust CPU cores and clusters. What You Will Learn How Tenstorrent designs and validates high‑performance RISC‑V CPU cores and clusters. Techniques for spanning pre‑silicon, emulation, and post‑silicon verification with shared stimulus. Ways to scale coverage, debug, and infrastructure across multiple CPU programs. How open hardware and software fit into Tenstorrent’s broader compute roadmap. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade. This role is hybrid, based out of Toronto, ON, Austin, TX or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development. Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms. Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines. Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios. Motivated by AI hardware and eager to learn verification strategies for new architectures and domains. What We Need Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning coverage goals and driving them to closure. Build and maintain reusable verification environments, agents, scoreboards, and supporting infrastructure in SystemVerilog and Python. Develop constrained-random and directed tests and close functional, code, and assertion coverage using data-driven approaches. Debug complex issues across RTL and testbench while collaborating with design, firmware, compiler, and architecture teams. Help evolve DV infrastructure including regression flows, CI/CD integration, EDA compute environments, and reproducible setups. Nice to have: Exposure to functional safety (FuSa) verification concepts for automotive AI workloads. Nice to have: Familiarity with formal verification methodologies, SVA (SystemVerilog Assertions), or formal property verification for complex control logic and microarchitectural corner cases. What You Will Learn How Tenstorrent verifies AI-native compute architectures including Tensix cores, RISC-V CPUs, matrix units, vector units, and datapath. How simulation, emulation, and software-driven workloads combine to validate both functional correctness and performance. How numerical precision formats such as BF16, FP4, and INT8 and on-chip dataflow impact verification complexity and coverage strategy. How to build scalable DV infrastructure across hybrid compute environments including containerized regression systems. How data analytics and modern AI tooling can enhance verification workflows and accelerate convergence. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building some of the world's most advanced AI systems, spanning custom silicon, distributed software, and large-scale compute infrastructure. The Debug & DevOps team sits at the intersection of infrastructure, developer productivity, debugging, and automation, ensuring engineering environments remain reliable, scalable, and efficient. This team partners closely with software, firmware, silicon, validation, and infrastructure engineers to rapidly diagnose complex issues, improve CI/CD workflows, and build the tooling that accelerates AI hardware and software development. You will help build and operate the infrastructure that powers engineering across the company, improving observability, automating workflows, and driving root-cause analysis across hardware and software systems. Your work will directly impact development velocity, platform reliability, and the delivery of next-generation AI hardware and software. This role is hybrid, based out of Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in DevOps, Site Reliability Engineering, Infrastructure Engineering, Production Engineering, or Software Engineering within complex distributed environments. Strong Linux systems expertise with experience troubleshooting infrastructure, networking, operating systems, CI/CD pipelines, and distributed applications. Proficient with automation and scripting using Python, Bash, Go, or similar languages, along with modern CI/CD and infrastructure tooling. Familiar with observability platforms such as Prometheus, Grafana, OpenTelemetry, ELK, or similar technologies. Passionate about solving complex technical problems through automation, root-cause analysis, and scalable engineering solutions. What We Need Investigate and resolve complex issues impacting development, validation, and production environments across hardware and software systems. Build and maintain CI/CD infrastructure, automation frameworks, deployment pipelines, and engineering workflows that improve productivity. Design and enhance monitoring, logging, observability, and alerting systems to improve reliability and operational visibility. Partner with software, firmware, silicon, validation, and infrastructure teams to diagnose issues across multiple layers of the technology stack. Drive long-term reliability improvements by automating operational tasks and implementing preventative solutions for recurring issues. What You Will Learn How next-generation AI hardware and software platforms are developed, validated, and deployed. Advanced debugging techniques spanning operating systems, networking, infrastructure, firmware, and application layers. How custom RISC-V processors, AI accelerators, and distributed software systems interact at production scale. How CI/CD, observability, and automation accelerate engineering productivity across AI hardware development. How world-class hardware and software teams collaborate to build cutting-edge AI computing platforms. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Want to be part of the leading edge of AI hardware? Tenstorrent is looking for a Component Engineer who is passionate about selecting the right parts, driving cost optimization, and ensuring critical components are available to support scalable AI compute systems. This role sits at the intersection of hardware design, supply chain strategy, and vendor management, helping ensure we can deliver cutting-edge AI platforms without delays from component shortages or supply chain risk. This role is on-site, based out of Santa Clara, California or Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’re interested in how hardware systems get built end-to-end and like working close to the components that make high-performance computing possible. You have 5+ years of experience in component engineering, hardware engineering, or supply chain roles within computing, networking, or complex electronic systems, supported by a degree in electrical engineering or a related field. You have a strong understanding of key electronic components, such as semiconductors, memory, power, passives, and connectors and you care about both technical performance and real-world availability. You’re comfortable working through tradeoffs like cost, performance, and supply risk, and you enjoy collaborating with cross-functional engineering and supply chain teams to find practical solutions. What We Need A partner to help shape the component foundation for next-generation AI compute systems by defining and maintaining the Approved Vendor List (AVL) and driving smart multi-sourcing strategies that keep programs moving. An engineer who will work closely with hardware, supply chain, and procurement teams to ensure the right components are selected, not just for performance, but for cost efficiency, availability, and long-term scalability. Someone who thrives on staying ahead of component lifecycle changes, market shifts, lead times, and supplier health, turning that insight into proactive risk mitigation and better design decisions. A contributor who will directly impact cost and supply optimization by identifying savings opportunities, improving sourcing strategies, and enabling smooth transitions through fast-moving product lifecycles. What You Will Learn How next-generation AI hardware platforms are built from the ground up, from early architecture decisions through component selection, validation, and large-scale production readiness. How strategic component choices and supply chain decisions directly influence the performance, cost, reliability, and scalability of advanced compute systems. How to collaborate across engineering, procurement, and supplier ecosystems to evaluate new technologies, qualify components, and help shape long-term hardware roadmaps. How to develop deep, practical expertise in managing supply risk, lifecycle transitions, and cost optimization in a fast-paced environment where hardware decisions have real-world impact. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. This role owns the technical strategy and architecture behind Tenstorrent’s core business applications, from ERP and CRM to the integrations that connect everything together. The focus is on building scalable, secure systems and integrations that hold up as the company grows, while providing hands-on technical leadership across SaaS, middleware, and custom services. This role is hybrid, based out of Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Technical leader who enjoys owning architecture decisions and setting engineering standards. Comfortable moving between strategy and hands-on execution across enterprise systems. Naturally collaborative, able to guide teams and partners through complex integration work. Motivated by building systems that scale cleanly and stay reliable under change. What We Need Ownership of development, customization, and technical oversight for core business applications and integrations. Leadership of middleware and integration architecture across ERP, CRM, SaaS platforms, APIs, and iPaaS solutions. Design and review of scalable, secure APIs, microservices, and cloud-based integration patterns. Proactive management of system performance, upgrades, risk mitigation, and long-term technical health. What You Will Learn How a fast-growing technology company scales its enterprise application ecosystem end to end. How integration strategy shapes operational efficiency across finance, sales, and go-to-market systems. How to influence tooling, architecture, and standards across a diverse SaaS and cloud environment. How to balance speed, reliability, and security in a constantly evolving business systems landscape. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Staff Digital Design Engineer to help define, build, and optimize high-performance IP and SoC architectures for next-gen AI and compute workloads. This role is ideal for engineers who thrive at the intersection of microarchitecture, RTL implementation, and performance-aware design. This role is hybrid, based out of Toronto, Ottawa, Boston, or Austin. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A digital design expert with a deep understanding of computer architecture and IP microarchitecture. Skilled in RTL development (Verilog/VHDL) and familiar with full ASIC flows. Comfortable optimizing for power, performance, and area (PPA) under aggressive design goals. A naturally collaborative and technical engineer — you thrive in spec definition, peer reviews, and team-wide planning. What We Need Architecture and RTL implementation of Tenstorrent’s custom IP blocks and SoC components. Performance-aware design decisions for compute, interconnect, or memory-heavy blocks. Occasional contributions to validation using emulation, FPGA prototyping, or UVM flows. Strong synthesis and timing closure awareness to support backend teams. Prior experience in on-chip fabric and interconnect designs is an asset. What You Will Learn How cutting-edge AI chips are built, from spec to silicon. What it takes to collaborate with teams designing novel processor and memory architectures. How to blend custom logic with standard SoC elements for power and scale. How cross-functional workflows come together across design, DV, physical, and firmware teams. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly technical Senior Staff/Principal Engineer to lead the porting and enablement of critical AI workloads. You will be a primary driver in migrating compute workloads to RISC-V architectures, ensuring our hardware is optimized for real-world application performance. The ideal candidate has a strong background in DevOps, workload porting, or application enablement. While this is an individual contributor role at its core, you will have the opportunity to grow and lead a small, specialized team over time as our workload migration efforts scale. This role is remote, based in the United States or Australia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Technical Catalyst: You thrive on the challenge of driving AI hardware porting to RISC-V and making complex software stacks run efficiently on new hardware. Systems Expert: You possess deep knowledge of system software, compilers, or low-level OS internals. You are an expert in ARM or x86 environments and are ready to apply those skills to the RISC-V frontier. A Project Driver: You have the technical authority to lead the implementation of a compute migration to RISC-V through strategic IT and DevOps enablement. Collaborative & Cross-Functional: You enjoy acting as the "technical glue" between IT, DevOps, and AI teams, coordinating complex efforts across boundaries to ensure seamless workload transitions. Architecture Agnostic: You are a systems thinker who understands how to bridge the gap between infrastructure and core silicon engineering. What We Need Education: BS/MS/PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field. Workload Expertise: Extensive experience in workload porting, DevOps engineering, or application enablement. Systems Fluency: Strong familiarity with CPU architectures and systems design, with a proven track record of troubleshooting and optimizing performance across new architectures. Leadership Qualities: Ability to coordinate across multiple technical teams and the potential to mentor or grow a small engineering pod. Execution Focus: A mindset geared toward technical delivery and methodology development rather than broad community networking. What You Will Learn Gain deep expertise in bleeding-edge RISC-V system software across server and AI-accelerated environments. Directly influence an upcoming project, a high-visibility initiative shaping the future of our internal compute infrastructure. Work at the intersection of AI/ML workloads and hardware/software co-design. Shape the technical roadmap for how the industry adopts RISC-V for high-performance compute. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an AI Processor IP Product Engineer to be the technical bridge between our cutting-edge AI processor technology and customer success. You'll guide customers through the integration of our advanced AI processors, RISC-V CPUs, and chiplet solutions into their SoCs, ensuring optimal performance and accelerated time-to-market. If you thrive in customer-facing roles and want to shape the deployment of revolutionary AI hardware across the industry, join our team. This role is hybrid, based out of Toronto, Canada or Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A customer-focused engineer with deep technical expertise in ASIC design and IP integration. Experienced problem-solver who excels at debugging complex system-level issues and silicon bring-up. Strong communicator who builds trusted relationships while managing technical engagements across the support lifecycle. Passionate about enabling customer success and translating complex technical concepts into actionable guidance. What We Need 3-5 years in the semiconductor industry with a degree in EE or related field. Hands-on expertise with ASIC design flows, IP integration, and relevant design views (.lib, LEF, ICL, PDL). Strong background in analog/digital design tools, silicon validation, and system-level debug. Proven track record in customer-facing engineering roles with excellent communication skills. What You Will Learn How to integrate state-of-the-art AI processors and chiplet architectures into diverse customer SoCs. Advanced debugging techniques spanning pre-silicon simulation to post-silicon validation. Strategies for influencing product roadmaps through direct customer feedback and technical insights. The full spectrum of IP productization—from technical documentation to customer training and support processes. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join Tenstorrent and help bring next-generation AI accelerator technology from silicon bring-up to production. You’ll work at the forefront of hardware innovation, diagnosing complex issues across chips, systems, firmware, and software while collaborating with some of the brightest engineers in the industry. This role offers the opportunity to solve challenging technical problems, build impactful debug solutions, and directly influence the reliability and performance of cutting-edge AI compute platforms. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on hardware debug engineer who thrives on solving complex, cross-functional problems at the intersection of silicon, firmware, and software. A curious and analytical problem solver who enjoys digging into failures, identifying root causes, and driving issues from initial discovery through resolution. An engineer with strong post-silicon validation and bring-up experience who is comfortable working in the lab and getting deep into system-level behavior. Someone who enjoys building tools, improving debug methodologies, and creating scalable solutions that help teams move faster. A collaborative teammate who can partner effectively with ASIC design, firmware, software, and validation teams to deliver reliable AI accelerator products. What We Need A skilled Post-Silicon Debug Engineer to diagnose, root-cause, and resolve hardware and firmware issues across Tenstorrent’s AI accelerator platforms, including Blackhole, Wormhole, Galaxy systems, and PCIe cards. An engineer who can lead silicon, board, and system-level debug efforts by analyzing failures across power delivery, thermal behavior, GDDR memory, Ethernet/SerDes links, PCIe, and NoC interconnects. Strong programming skills in Python and C to develop debug scripts, diagnostic tools, and automation frameworks that accelerate failure analysis and triage. Hands-on lab expertise with tools such as oscilloscopes, logic analyzers, protocol analyzers, and other hardware debug equipment. A technical leader who can interpret schematics, datasheets, register states, telemetry data, and firmware behavior to uncover complex system issues and drive solutions. What You Will Learn Gain deep exposure to cutting-edge AI accelerator architectures and the challenges of bringing advanced silicon from prototype through production. Develop expertise across the full hardware stack, from silicon behavior and board-level design to firmware, drivers, and system software interactions. Work alongside world-class ASIC, firmware, and software engineers to solve some of the most challenging hardware and system-level problems in AI computing. Expand your knowledge of high-speed interfaces, including GDDR/DDR memory, PCIe, Ethernet/SerDes, power management, and system validation. Build and improve debug infrastructure, methodologies, and processes that directly impact the reliability and scalability of Tenstorrent products. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Join the team building the silicon behind Tenstorrent’s custom AI platform. As an RTL Design Engineer, you will contribute to the development of next-generation AI hardware by implementing and optimizing micro-architectures, improving performance and power efficiency, and collaborating across hardware teams. This role offers the opportunity to work on challenging, high-impact designs in a fast-paced environment. This role hybrid, based out of Belgrade, Serbia. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are: An engineer with a strong foundation in digital design and micro-architecture. Familiar with RTL development, debugging, and performance analysis workflows, including clock/reset, power, boot, and debug logic. Comfortable writing Verilog or SystemVerilog and interpreting synthesis and timing results. Motivated to learn how high-performance AI hardware is built and optimized from the ground up. What We Need: Contributors who can implement and refine micro-architectural features for Tenstorrent’s AI hardware IP. Engineers who can analyze performance bottlenecks and suggest improvements that balance power, area, and frequency. Teammates who collaborate across RTL, DV, performance, and physical design to explore and evaluate design trade-offs. Developers who can debug RTL issues in both simulation and post-silicon environments and contribute to improving internal tools and flows. What You Will Learn: Techniques for developing high-performance RTL targeting AI and ML workloads. How power, performance, and area are balanced across design, verification, and physical implementation. Tools and methods used to evaluate design trade-offs and optimize compute architectures. What it takes to ship production-grade silicon that supports next-generation AI systems. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation AI compute. The Kernel Development and Optimization team develops the performance-critical kernels that unlock the full capability of our hardware across ML and HPC workloads. This role is hybrid based out of Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strong C++ systems engineer with experience writing performance-critical or low-level software. Comfortable reasoning about concurrency, synchronization, latency hiding, and compute versus memory trade-offs. Data-driven in your approach, using profiling and benchmarking results to guide optimization decisions. Effective at debugging complex runtime or kernel-level issues in large codebases. Structured thinker who can break down ambiguous performance problems into measurable experiments. What We Need Engineers who can design, implement, and optimize GPU-style kernels such as matrix multiplication, attention primitives, and data-movement operations. Clear ownership of performance, from identifying bottlenecks to delivering measurable throughput improvements. Contribution to host-side orchestration code and parallelization strategies. Development of micro-benchmarks, regression tests, and tooling to ensure correctness and sustained performance gains. Close collaboration with compiler, runtime, ML, and hardware teams to integrate kernels into production systems. What You Will Learn The execution model, memory architecture, and performance characteristics of Tenstorrent AI hardware. How to write and optimize accelerator kernels outside traditional CUDA-first ecosystems. Practical AI-assisted and agentic workflows for kernel generation, debugging, and optimization. How to translate performance intuition into rigorous, reproducible engineering results. How low-level kernels, compilers, runtime systems, and hardware co-evolve in modern AI platforms. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. This role sits at the deep-tech intersection of silicon development, low-level firmware, and high-speed networking. You won't just be writing drivers; you’ll be the bridge between our AI silicon and the network. You will work with best-in-class Ethernet IP and in-house designs to architect, enable, and optimize the firmware that powers next-generation AI infrastructure. The role is focused on the hardware-software boundary, spanning silicon bring-up, SerDes/PHY configuration, and performance tuning to ensure seamless, high-performance connectivity across complex, large-scale platforms. This role is hybrid, based out of Toronto, Canada or Vancouver Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You are passionate about the "first few layers" of the stack. You’d rather debug a link-training state machine than a high-level application. You thrive on understanding the inner workings of Ethernet hardware (MAC/PHY/PCS) and how to control it efficiently via bare-metal firmware. You enjoy the "detective work" of hardware bring-up, using oscilloscopes or logic analyzers when the software behavior doesn't match the silicon's intent. You speak the languages of both the RTL team and the Network Software team, translating hardware constraints into software requirements. What We Need Develop and maintain low-level firmware to manage Ethernet MAC, PHY, and SerDes components. Drive silicon bring-up and validation of networking subsystems in the lab. Implement and optimize link-training algorithms and auto-negotiation protocols. Work closely with silicon architects to influence the design of next-generation networking hardware from a firmware perspective. Debug complex hardware-software interactions, including signal integrity issues and protocol-level timing bugs. What You Will Learn What it means to shape AI acceleration hardware and networking infrastructure from the ground up. How cutting-edge Ethernet technologies are integrated and optimized for large-scale AI systems and high-performance compute platforms. The mastery of collaborating with world-class silicon, systems, and software teams to solve frontier engineering challenges. How to help define the networking architecture that will power the next era of AI platforms. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team to define and implement RTL for high-performance CPUs. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in CPU microarchitecture with expertise in Rename, Scheduler, ROB, Load Store, Branch Prediction, Cache or Datapath. Skilled in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation, synthesis, and power analysis. Proficient in debugging RTL/logic across multiple design hierarchies and pre/post-silicon environments. Background in microarchitecture definition, design specification, and performance-driven trade-off analysis. What We Need Own RTL design and microarchitecture development for a portion of a CPU block of a high-performance RISC-V CPU. Collaborate closely with DV, PD, and performance engineers to meet functional, timing, and power goals. Use innovative techniques to optimize power, performance, and area while driving RTL experiments and evaluating results. Partner with validation and test teams to ensure robust pre-silicon and post-silicon execution. Enhance RTL design environment, tools, and methodologies to improve development efficiency. What You Will Learn End-to-end exposure to CPU design from microarchitecture through timing and power convergence. Hands-on experience optimizing high performance CPU designs in both pre-silicon and post-silicon phases. Integration of open-source and industry-standard tools to improve RTL flows and results. Work in a deeply technical, highly collaborative team solving cutting-edge CPU design challenges. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking an Senior Engineer to develop and optimize the software stack for our IP customers, enabling them to successfully integrate our AI and RISC-V hardware into their systems. In this role, you will build and support a versatile range of software components, from bare-metal firmware and drivers to system-level tools and APIs, ensuring a seamless customer experience. You will partner closely with hardware engineering, IP delivery, customer support, and product teams to deliver robust, scalable, and high-performance software solutions tailored to diverse customer architectures. Success in this role requires adaptability, strong system-level debugging skills, and the ability to bridge the gap between complex hardware IP and user-friendly software integration. This role is hybrid, based out of Toronto, ON, Austin, TX, or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced software engineer with a strong foundation in C/C++, system programming, and low-level software design. Parallel processing, SIMD architectures (SSE, AVX, Arm Neon), GPU programming (CUDA, OpenCL) a plus. Background in firmware, device drivers, embedded systems, or hardware-software co-design. Skilled at navigating and troubleshooting complex, full-stack software environments. Known for working effectively with cross-functional teams and external customers to resolve integration challenges. Able to balance versatile, hands-on coding with high-level architectural problem-solving. What We Need Develop, optimize, and maintain software components for Tenstorrent’s hardware IP offerings. Define and build reference software, SDKs, and toolchains to streamline the customer integration process. Diagnose and resolve complex hardware/software interaction issues during customer bring-up and deployment. Drive the creation of high-quality documentation, test suites, and integration guides for IP software deliverables. Partner cross-functionally with hardware and architecture teams to ensure future IP designs are optimized for software usability. What You Will Learn How to build and deploy robust software stacks for cutting-edge AI and RISC-V silicon IP. How to drive successful hardware-software integration across a diverse range of customer environments and architectures. Firsthand exposure to the complete silicon IP lifecycle, from initial bring-up to massive-scale customer deployment. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the world’s fastest, most efficient AI compute clusters. TT-Fabric is the high-performance nervous system of this platform: the low-level networking layer that lets thousands of RISC-V and AI processors snap together into a single, massively parallel distributed supercomputer. If you love squeezing nanoseconds out of hot paths, designing protocols that move data at absurd scale, and turning messy hardware constraints into elegant distributed systems, this is an opportunity to shape the fabric that future AI models will run on This role is hybrid based out of Santa Clara, CA; Austin, TX; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who We Are Strong systems engineer with deep C or C++ experience and comfort working in low-level or bare-metal environments. Passionate about hardware-software interaction, performance tuning, and eliminating inefficiencies at the protocol level. Curious about networking, synchronization, and communication across large clusters. Comfortable reasoning from first principles and challenging industry conventions. Motivated by building infrastructure that directly impacts large-scale AI training and inference performance. What We Need Architect, implement, and maintain TT-Fabric, our low-level networking library powering distributed inference and training. Design scalable communication systems capable of coordinating thousands of AI processors efficiently and reliably. Optimize protocols, synchronization strategies, and data movement to extract maximum hardware performance. Integrate TT-Fabric APIs into the broader programming model in collaboration with AI and hardware teams. Help define the long-term architecture of Tenstorrent’s distributed systems stack. What You Will Learn How large-scale AI clusters are architected from the networking layer up. The performance characteristics of custom AI hardware and RISC-V processors at scale. Advanced synchronization, collective communication, and interconnect optimization techniques. How distributed systems design decisions directly influence model throughput and training efficiency. How hardware and networking software co-evolve in next-generation AI infrastructure. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As our TT-Distributed Software Engineer, you will develop and optimize distributed software systems that power the most efficient and highest-performing AI and HPC clusters. In this role, you'll work on distributed programming across multiple nodes, utilizing systems programming, inter-node communication, and Tenstorrent’s scalable architectures to advance the state-of-the-art distributed inference and training infrastructure. This role is hybrid, based out of Santa Clara, CA; Austin, TX; or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Strong C or C++ engineer with solid foundations in systems programming, operating systems, and distributed systems principles. Enthusiastic about distributed computing, including IPC, socket programming, and cluster resource coordination. Comfortable reasoning about scalability, fault tolerance, and performance across multi-node environments. Curious and first-principles thinker who challenges conventional approaches to distributed system design. Motivated to grow into a deep technical expert in large-scale distributed AI infrastructure. What We Need Architect, implement, and optimize distributed software systems that coordinate computation and communication across clusters of AI accelerators and CPUs. Design and build distributed APIs enabling data-parallel and tensor-parallel AI workloads. Leverage MPI-based technologies and related frameworks to scale programming models across multiple hosts and compute nodes. Develop robust systems using IPC, inter-node sockets, and distributed communication primitives to ensure reliability and high performance. Build and maintain testing, debugging, profiling, and monitoring tools for large-scale distributed workloads and collaborate with model and systems teams on cluster bring-up. What You Will Learn How large-scale distributed inference and training systems are architected across thousands of accelerators. Advanced techniques in collective communication, synchronization, and parallel workload distribution. The performance characteristics of Tenstorrent hardware in multi-node cluster environments. How distributed programming models integrate with compilers, runtimes, and AI frameworks. The real-world challenges of deploying, debugging, and scaling next-generation AI clusters. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
Tenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a skilled Software Engineer with a passion for building high-performance, low-level systems software. In this role, you’ll contribute to the development and optimization of the infrastructure that powers our cutting-edge processors, with a primary focus on C/C++ development and low-level programming. You'll work closely with large inference and training model development to further drive Scale Out software and hardware performance. This role is hybrid, based out of Toronto, ON. Who You Are Strong C or C++ systems engineer with a deep understanding of memory, threading, I/O, and low-level execution models. Experienced building low-level software, drivers, embedded systems, or performance-critical infrastructure. Comfortable working close to hardware and curious about how systems behave under the hood. Proficient with Linux systems programming and debugging tools such as gdb, strace, and perf. Structured problem solver who thrives in fast-paced, highly technical environments. What We Need Design, develop, and maintain core infrastructure software that interfaces directly with Tenstorrent hardware. Build low-level libraries and APIs for communication and synchronization across compute nodes. Optimize system-level software for performance, scalability, and reliability in distributed environments. Support hardware bring-up, system testing, and deployment in close collaboration with hardware and software teams. Integrate infrastructure components with internal programming models, tools, and runtime systems. What You Will Learn The execution model and system architecture of Tenstorrent AI hardware. How distributed accelerator systems coordinate communication and synchronization at scale. Advanced techniques in system-level performance tuning across multiple layers of the stack. How low-level infrastructure, runtimes, and hardware co-evolve in high-performance AI platforms. The challenges of building reliable, production-grade infrastructure for large-scale AI workloads. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
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